Digital Logic Design Lab Projects

This is a collection of my projects for the Digital Logic Design lab at the University of Tehran, held by Prof. Zainalabedin Navabi in Spring 2022. The repository containing the assignments is available here on GitHub. All projects were completed in groups of two.

Group members:

• Pasha Barahimi
• Misagh Mohaghegh

Assignments

1. Clock and Periodic Signal Generation
2. FPGA Realization of a Radix-4 Multiplier
3. Function Generator
4. Accelerator and Wrappers